FIT2069 - Computer architecture - 2018

6 points, SCA Band 2, 0.125 EFTSL

Undergraduate - Unit

Refer to the specific census and withdrawal dates for the semester(s) in which this unit is offered.


Information Technology

Chief examiner(s)

Dr Carlo Kopp

Not offered in 2018


FIT1031 or FIT1001 and FIT1008 or FIT1015


This unit covers the internal mechanism of computers and how they are organised and programmed. Topics include combinatorial and sequential logic, Boolean Algebra, Karnaugh maps, counters, ripple adders, tree adders, memory/addressing, busses, speed, DMA, data representation, machine arithmetic, microprogramming, caches and cache architectures, virtual memory and translation look-aside buffers, vectored interrupts, polled interrupts, pipelined architecture, superscalar architecture, data dependency, hazards, CISC, RISC, VLIW machine architectures.


At the completion of this unit, students should be able to:

  1. analyse simple logic circuits;
  2. explain and analyse key processor components;
  3. explain and analyse computer organisation;
  4. write and debug simple assembly language programs;
  5. use simulator programs to model computer system components.


Examination (2 hours): 60%; In-semester assessment: 40%

Workload requirements

Minimum total expected workload equals 12 hours per week comprising:

  1. Contact hours for on-campus students:
    • Two hours of lectures
    • One 3-hour laboratory or one 2-hour tutorial (alternating weeks)
  2. Additional requirements (all students):
    • A minimum of 7-8 hours independent study per week for preparing for and completing lab and project work, private study and revision.

See also Unit timetable information

Additional information on this unit is available from the faculty at: