6 points, SCA Band 2, 0.125 EFTSL
Undergraduate - Unit
Refer to the specific census and withdrawal dates for the semester(s) in which this unit is offered.
Department of Electrical and Computer Systems Engineering
Mr Michael Zenere
Dr Narayanan Ramakrishnan (Malaysia)
This unit provides an introduction to computer architecture using a modern microprocessor as an example. Practical considerations involved in interconnecting logic element are explored, along with software and hardware techniques for interfacing computers to peripheral devices. An introduction to communication protocols used to connect local peripheral devices to a microprocessor, including RS232/RS422/RS485, CAN bus and i2C is provided. Real-time systems including concurrency, inter-process communications and scheduling are introduced.
At the successful completion of this unit you will be able to:
- Describe the organisation and operation of an embedded computer system consisting of components including a microprocessor, system bus, memory hierarchy, and peripherals.
- Describe different analogue-to-digital conversion techniques and serial communication protocols.
- Determine the performance of C and/or assembly programs when processing data from peripheral devices.
- Analyse, design and test real time software employing concurrency and inter-process communication.
- Analyse and compare behaviour of different real-time schedulers.
- Appreciate how an optimising compiler can translate a high level language program into efficient assembly code.
Continuous assessment: 40%
Examination: (2 hours) 60%
Students are required to achieve at least 45% in the total continuous assessment component (assignments, tests, mid-semester exams, laboratory reports) and at least 45% in the final examination component and an overall mark of 50% to achieve a pass grade in the unit. Students failing to achieve this requirement will be given a maximum of 45% in the unit.
Two 1 hour lectures, one 3 hour laboratory/practice class and 7 hours of private study per week
See also Unit timetable information