Faculty of Engineering

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This unit entry is for students who completed this unit in 2016 only. For students planning to study the unit, please refer to the unit indexes in the the current edition of the Handbook. If you have any queries contact the managing faculty for your course or area of study.

Monash University

6 points, SCA Band 2, 0.125 EFTSL

Undergraduate - Unit

Refer to the specific census and withdrawal dates for the semester(s) in which this unit is offered.



Organisational Unit

Department of Electrical and Computer Systems Engineering


L Kleeman


Not offered in 2016


The unit enables students to understand, analyse, specify, design and test embedded systems in terms of the hardware architecture, distributed systems and the software development that deploys a real time kernel and the migration of software to hardware. The design, analysis and implementation of a real time kernel will be studied that includes scheduling policies, process creation and management, inter-process communication, efficient handling of I/O and distributed processor implementation issues. Students will be involved in a design project that involves the hardware and real time system design of an embedded system with hard deadlines using an FPGA development system.


  • To understand the development process for embedded systems from specification, simulation, implementation and testing
  • To gain an appreciation of the effectiveness and properties of a real time kernel in the software development process
  • To gain a knowledge and understanding of the properties of different scheduling policies and their implementation in a real time system
  • To understand the process of migration of a software definition to a hardware implementation as a means to accelerate an embedded system design
  • To understand the complexities and design approaches necessary in a distributed real time embedded system.


Continuous assessment: 40%
Examination: (3 hours) 60%.
Students are required to achieve at least 45% in the total continuous assessment component (assignments, tests, mid-semester exams, laboratory reports) and at least 45% in the final examination component and an overall mark of 50% to achieve a pass grade in the unit. Students failing to achieve this requirement will be given a maximum of 45% in the unit.

Workload requirements

2 hours lectures, 3 hours laboratory and practice classes and 7 hours of private study per week

See also Unit timetable information

Chief examiner(s)


ECE3073 or TRC3300


ECE4705, ECE5075