units

ECE3062

Faculty of Engineering

Monash University

Undergraduate - Unit

This unit entry is for students who completed this unit in 2013 only. For students planning to study the unit, please refer to the unit indexes in the the current edition of the Handbook. If you have any queries contact the managing faculty for your course or area of study.

print version

6 points, SCA Band 2, 0.125 EFTSL

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LevelUndergraduate
FacultyFaculty of Engineering
Organisational UnitDepartment of Electrical and Computer Systems Engineering
OfferedClayton Second semester 2013 (Day)
Sunway Second semester 2013 (Day)
Coordinator(s)Dr Jean-Michel Redoute (Clayton); Dr Mark Ng (Sunway)

Synopsis

The unit further explores the integration of multiple devices on a chip. MOS and BJT single ended as well as differential amplifier circuits, along with basic analogue circuit blocks like the current mirror, are introduced and developed using small signal models. Practical Operational Amplifiers are considered where properties deviate from ideal in terms of frequency response, CMMR, noise, stability and input/output impedance. The use of feedback in electronic circuits is studied, and ways to improve arising stability issues in operational amplifiers (eg using pole compensation) are discussed. Nyquist is presented and frequency domain analysis and design shall be explicitly explored via Bode plots. Concepts of State Space representation, transfer functions, canonical realisation, observability and controllability and discrete-time systems are presented.

Outcomes

  1. To extend semiconductor theory to additional electronic devices and to integrated circuit structures.
  2. To gain more detailed knowledge and understanding of electronic amplifier circuits, and to understand how transistors and electronics are used in higher frequency and oscillator applications.
  3. Introduce feedback, stability.and dominant pole compensation.
  4. To understand SISO control systems, state space modelling and their relationship to transfer functional representation.
  5. To introduce discrete-time/sampled-data control systems.

To extend the ability and practical skills to:

  1. design electronic circuits using simulation tools and construct, debug and verify the operation of electronic circuits in the laboratory.
  2. design and experimentally verify the operation of SISO control systems.

Assessment

Mid-semester test/laboratory/project and assignment work: 30%, Examination: (3 hrs) 70%
Students are required to achieve at least 45% in the total continuous assessment component (assignments, tests, mid-semester exams, laboratory reports) and at least 45% in the final examination component and an overall mark of 50% to achieve a pass grade in the unit. Students failing to achieve this requirement will be given a maximum of 45% in the unit.

Chief examiner(s)

Contact hours

2 hours lectures, 3 hours laboratory/practice classes and 7 hours of private study per week

Prerequisites

Prohibitions

ECE2062