Not offered in 1998
G K Egan
6 points
* 39 hours of lectures and laboratory work
* Irregular availability
* Clayton
Objectives The student is expected to develop an understanding of microprocessor architectures and interfacing techniques and develop the ability to design interfaces for a typical bus. The student is also expected to acquire an understanding of the methods of using parallelism in computer organisation.
Synopsis Microprocessor architectures; advanced features of 16 and 32-bit processors. Microprocessor buses and interfacing: VME bus, Multibus II and Future bus. Bus arbitration and protocols. High-speed communications in microprocessor systems. Parallel architectures: single master and multimaster operations. Real-time operating systems.
Assessment Laboratory work: 100%
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