ECE5604

Large scale digital design ( 6 points, SCA Band 2, 0.125 EFTSL)

Leader: L Kleeman

Offered:
Clayton First semester 2005 (Day)

Synopsis: The subject covers the areas of CMOS circuit design, fabrication, design rules and layout, CMOS circuit characterisation, performance estimation and subsystem layout for combinational and sequential circuits. Metastable failure in digital systems is treated due to its fundamental importance in digital design. The subject also teaches hardware description languages such as VHDL and their relationship to programmable logic devices (PLD). The use of current design tools will be emphasised for design entry, simulation and testing.Students will complete a group project design.

Assessment: Examinations (3 hours): 70% + Laboratory work: 30%

Contact Hours: 26 lectures, 26 hours of practice classes and practical work

Prohibitions: ECE4604