ECE3703

Computer engineering ( 4 points, SCA Band 2, 0.083 EFTSL)

Leader: G Egan

Offered:
Clayton First semester 2005 (Day)
Malaysia First semester 2005 (Day)

Synopsis: The design and implementation of common digital logic families and practical considerations in logic design including design for testability asynchronous logic design, noise margin and timing constraints. A simple microprocessor architecture is introduced and this material is extended to consider how a microprocessor, memory and other peripheral circuits are connected to form a working system. The software and hardware required to interface a computer to the outside world are examined.

Assessment: Examination (3 hours): 70% + Laboratory and assignment work: 30%

Contact Hours: 26 hours of lectures and 24 hours of practice classes and laboratory classes

Prerequisites: ECE2701 and ECE2702 (or CSE1303)

Prohibitions: TEC3743