A P Paplinski
6 points - Two 1-hour lectures and one 2-hour practical class per week - Second semester - Clayton - Prerequisites: CSE1101 or equivalent
Objectives At the completion of this subject students should understand the structure and working of a MOSFET transistor and a CMOS inverter, and related circuit layouts and technological steps to manufacture them. They should be familiar with methods of designing digital circuits using switch and gate logic and with various design methodology such as: full-custom, standard cells and gate arrays. They will have practical exposure to Integrated Circuit CAD tools, specifically tools such as layout editors, design rule checkers, schematic capture and VHDL description of a design, functional, logic and switch-level simulation, and automatic placement and floor planning. They will be able to design integrated circuits implementing algorithms for multiplication, random number generation and vector rotation.
Synopsis VLSI technology A MOSFET transistor -
its structure and working. A dc behaviour. A schematic symbol, a stick diagram
symbol as a topological description of the integrated circuit layout, geometry
of the integrated circuit layout, fabrication masks. A CMOS inverter and its
diagrammatic representations. A circuit diagram and a stick diagram as a
topological description of the integrated circuit layout. Geometry of the
integrated circuit layout. Fabrication masks. A cross-sectional view of an
inverter. A transfer characteristic and the switching behaviour of the CMOS
inverter. Basic CMOS technology. From the circuit layout, through the
fabrication masks and technological steps to the implementation of an
integrated circuit on a silicon wafer. Layout design rules. Layout editors.
Design-rule checkers. CMOS static logic gates - circuit diagrams, stick
diagrams and mask layouts. Serial and parallel connections of MOS transistors.
NAND, NOR gates. The concept of a composite CMOS gate. XOR gates. Adders.
Static CMOS latches: an S-R latch, D latch and flip-flop, a T flip-flop. A
library of standard cells.A 'switch logic' versus a 'gate logic'. A
complementary switch - a transmission gate. A multiplexer. A Tri-state
inverter. A D-latch using the tri-state inverters. An XOR gate.
A methodology of designing an optimal layout of CMOS functional gates.
Design methodologies: Full-custom, standard cells, gate arrays, sea-of gates.
Design example: A full-custom design of a barrel switch/rotator. I/O pads and
pad frames. Case designs Integrated-Circuit Design Tools. Hardware
description languages - VHDL. Schematics capture. Silicon compilers. Layout
editors. Design Rule Checkers. Functional, logic and switch-level simulation.
Automatic placement and floor-planning. Arithmetic algorithms for VLSI. 1-bit
and 2-bit Booth's multiplication algorithms. Designing a word-serial
multiplication circuit/processor. The data-path and the control part. VHDL
design specification. Designing parallel multipliers. Addition of n m-bit
numbers. The 'Carry-Save' Adder. Designing a random number generator. A CORDIC
algorithm and its implementations.
Assessment Examination: 60% - Assignments: 40%
Recommended texts
Weste N and Eshraghian K Principles of CMOS VLSI design: A
system perspective 2nd edn, Addison-Wesley, 1993
Wolf W Modern VLSI design: a system approach Prentice-Hall, 1994
Madisetti V K VLSI digital signal processors Butterworth-Heinemann,
1995
Mentor Graphics Corporation Mentor graphics on-line documentation
1997