Authorised by Academic Registrar, April 1996
Objectives The student is expected to acquire knowledge and understanding of the design, fabrication and simulation of very large scale integration (VLSI) circuits, systems and architectures; changes in microelectronic device density, speed, power dissipation, fabrication processes and logic families; VLSI computer-aided design (CAD) tools; and hierarchical VLSI design practice.
Synopsis nMOS and CMOS circuit design, fabrication, design rules, layout, circuit extraction and performance estimation and optimisation. Data and control in systematic structures. CAD software, programmable logic arrays, CPU architecture and implementation, metastable behaviour, RAM and ROM implementations, highly concurrent architectures and area-time tradeoffs. A CMOS class design project will be set.
Assessment Examinations (2 hours): 60% + Laboratory work: 40%