Authorised by Academic Registrar, April 1996
Objectives The student is expected to acquire a critical understanding of the limitations of Von Neumann architectured computing machinery and how many of these have been systematically eliminated through the evolvement of computer architectures up to the present time.
Synopsis Von Neumann architectured machines; stack, array processing, pipelined, multiprocessor, data flow and massively parallel architectured machines; systolic arrays, high reliability systems; concurrency, semaphores, resource management, deadlock avoidance.
Assessment Examination (2 hours): 100%