Authorised by Academic Registrar, April 1996
Objectives On completion of the subject, students should understand the differences between computer architecture and organisation; know about memory organisation, CPU structure, and processor design; know about parallel processing and RISC architectures; be able to design speed-up techniques for computer arithmetic; and be able to design and implement a control unit.
Synopsis This subject covers how digital subsystems are organised to provide computational engines. Topics include machine arithmetic, addition, subtraction, multiplication and division algorithms, speed-up techniques for arithmetic, microprogramming, horizontal, vertical and diagonal microprogramming, nanoprogramming, microprogramming performance issues, caches, cache coherence, cache management, congruent caches, translation look-aside buffers, write through, pipelining, RISC machines, parallel organisation.
Assessment Examination (2 hours): 70% + Assignments: 30%