units

ECE2072

Faculty of Engineering

Monash University

Undergraduate - Unit

This unit entry is for students who completed this unit in 2015 only. For students planning to study the unit, please refer to the unit indexes in the the current edition of the Handbook. If you have any queries contact the managing faculty for your course or area of study.

print version

6 points, SCA Band 2, 0.125 EFTSL

Refer to the specific census and withdrawal dates for the semester(s) in which this unit is offered.

LevelUndergraduate
FacultyFaculty of Engineering
Organisational UnitDepartment of Electrical and Computer Systems Engineering
OfferedClayton Second semester 2015 (Day)
Malaysia Second semester 2015 (Day)
Coordinator(s)Assoc Professor L Kleeman (Clayton); Mr Nader Kamrani (Malaysia)

Synopsis

This unit introduces the student to modern logic design techniques, hardware used and common representations. Topics include two and multi-level combinational logic, decoders, multiplexers, arithmetic circuits, programmable and steering logic, flip-flops, registers, counters, RAM and ROM. Using this hardware the design component will include finite state machine design and applications to computer data path control. This will incorporate simple analogue and digital I/O interfacing. Programmable logic devices will be covered, and the use of a hardware description language for describing, synthesizing and testing digital logic. Laboratories cover logic design, implementation, and testing.

Outcomes

To understand the analysis and design of complex digital systems from building blocks, using modern digital design software.

Assessment

Laboratory and assignment work: 30%
Examination (3 hours): 70%
Students are required to achieve at least 45% in the total continuous assessment component (assignments, tests, mid-semester exams, laboratory reports) and at least 45% in the final examination component and an overall mark of 50% to achieve a pass grade in the unit. Students failing to achieve this requirement will be given a maximum of 45% in the unit.

Workload requirements

3 hours lectures, 3 hours laboratory and practice classes and 6 hours of private study per week

See also Unit timetable information

Chief examiner(s)

Prohibitions

ECE2701, TEC2172, TRC2300