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Monash University

Monash University Handbook 2010 Undergraduate - Unit

6 points, SCA Band 2, 0.125 EFTSL

FacultyFaculty of Engineering
OfferedClayton Second semester 2010 (Day)
Sunway Second semester 2010 (Day)
Coordinator(s)L Kleeman


An introduction to modern logic design, hardware and representations. Two and multi-level combinational logic, decoders, multiplexers, arithmetic circuits, programmable and steering logic, flip-flops, registers, counters, RAM and ROM, finite state machine design and application to computer data path control. Programmable logic devices and hardware description languages will be introduced for describing, synthesizing and testing digital logic. An introduction will be given to VLSI design. Laboratories cover logic design, implementation, testing and CAD.


The student is expected to acquire a basic knowledge and understanding of the discrete representation of information and its processing in digital logic systems; the flexibility and diversity of applications of digital logic; both combinational and sequential logic implementations; the non-ideal properties of logic circuits and their design constraints; and an introduction to the use of hardware description languages and programmable logic devices.


Examination (3 hours): 70%
Laboratory work: 20%
Written assignments: 10%

Chief examiner(s)

Professor Arthur Lowery

Contact hours

3 hours lectures, 3 hours laboratory/practice classes and 6 hours of private study a week


ECE2701, ECE2702, GSE2303, TEC2712