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ECE4604 - Large scale digital design

4 points, SCA Band 2, 0.083 EFTSL

Undergraduate Faculty of Engineering

Leader: L Kleeman, R Parthiban (M'sia)

Offered

Malaysia First semester 2007 (Day)

Synopsis

The unit covers the areas of CMOS circuit design, fabrication, design rules and layout, CMOS circuit characterisation, performance estimation and subsystem layout for combinational and sequential circuits. Metastable failure in digital systems is treated due to its fundamental importance in digital design. The subject also teaches hardware description languages such as VHDL and their relationship to programmable logic devices (PLD). The use of current design tools will be emphasised for design entry, simulation and testing. Students will complete a group project design.

Assessment

Laboratory and assignment work: 30%
Examination (3 hours): 70%

Contact hours

26 lectures, 26 hours of practice classes and laboratory classes

Prerequisites

ECE3703 and ECE2601 (or ELE2291)